在以太网传输中,MAC层控制链路层发送和接收帧的数量,而物理层则负责将一个帧转换为适合于在物理介质上传输的表示。
一、RGMII与GMII的区别
RGMII(Reduced Gigabit Media Independent Interface)是Gigabit Media Independent Interface(GMII)的一个缩减版,包含MII(Media Independent Interface)的减少版。相比于GMII,RGMII使用比GMII更少的引脚(12根CAT5电缆中仅需要4根),从而为Gigabit Ethernet的应用节省了板级布线的成本。RGMII可以替代GMII,以使交换机和路由器在物理层接口上实现更高的集成度,以便在交换机和路由器上节省价格和面积。
二、RGMII与GMII和MII的区别
MII,即媒体独立接口(Media Independent Interface),是一个用于物理层(PHY)和MAC层之间的标准接口。它有四条同步时钟信号,两条数据交换信号(TXD和RXD)和四条控制信号(RXERR、COL、CRS和RXDV)。
GMII(Gigabit Media Independent Interface)是MII的一种扩展,为在千兆速率下的以太网提供了额外的信号
RGMII是GMII的一种缩减版,以适配电信号传输在板上的接口中。RGMI采用四条同步时钟信号,与MII类似,但是使用RMII只需要两根差分引脚,而不需要两根双向控制引脚。RGMII是一种在Gigabit Ethernet中用于连接MAC到PHY的标准接口,具有与GMII接口类似的功能和时序。由于RGMI所需的引脚数量较少,因此对收发器芯片的成本和设计难度都有所降低。
三、RGMII的时钟和数据信号时序
RGMII始终使用MII信号的双倍速时钟,即50MHz。RGMII使用八个接口信号:tx_clk、txd[3:0]、tx_ctl、rx_clk、rxd[3:0],以及rx_ctl。各个信号的含义如下:
- tx_clk:传输GPIO时钟,由MAC提供。
- txd[3:0]:四条传输数据线,从MAC到PHY。
- tx_ctl:传输控制线,从MAC到PHY。
- rx_clk:接收GPIO时钟,由PHY提供。
- rxd[3:0]:四条接收数据线,从PHY到MAC。
- rx_ctl:接收控制线,由PHY提供。
┌──────────────────────┐ │ │ │ A │ Phy │ │ │ ▲ │ │ tx_clk│───>|───▲───│ │ ▼ │ │ │ txd[3:0] │ │ │ tx_ctl │ │ │ MAC │ ▲ │ │ │ rx_clk│───|<───▼───│ │ ▼ │ │ rxd[3:0] │ │ rx_ctl │ └──────────────────────┘
四、RGMII的使用实例
下面的示例代码将RGMII接口与PHY和MAC连接在一起以支持以太网通信。
/* Set up GPIO clocks */ volatile unsigned int * CM_WKUP_GPIO1_CLKCTRL = (unsigned int *)0x44E004C4; *CM_WKUP_GPIO1_CLKCTRL = 0x02; while((*CM_WKUP_GPIO1_CLKCTRL & 0x03) != 0x02); /* Set up GPIO pins for RGMII */ volatile unsigned int * CONTROL_PADCONF_MDI = (unsigned int *)0x44E107C4; *CONTROL_PADCONF_MDI = (0x08 << 16) | 0x100; // RGMII1_TX_EN volatile unsigned int * CONTROL_PADCONF_MDIO = (unsigned int *)0x44E107C8; *CONTROL_PADCONF_MDIO = (0x08 << 16) | 0x100; // RGMII1_TXD0 volatile unsigned int * CONTROL_PADCONF_RGMII_RX_BYPASS = (unsigned int *)0x44E107CC; *CONTROL_PADCONF_RGMII_RX_BYPASS = (0x08 << 16) | 0x100; // RGMII1_TXD1 volatile unsigned int * CONTROL_PADCONF_RGMII_RX_CTL = (unsigned int *)0x44E107D0; *CONTROL_PADCONF_RGMII_RX_CTL = (0x08 << 16) | 0x100; // RGMII1_RXD0 volatile unsigned int * CONTROL_PADCONF_RGMII_RXD0 = (unsigned int *)0x44E107D4; *CONTROL_PADCONF_RGMII_RXD0 = (0x08 << 16) | 0x100; // RGMII1_RXD1 volatile unsigned int * CONTROL_PADCONF_RGMII_RXD1 = (unsigned int *)0x44E107D8; *CONTROL_PADCONF_RGMII_RXD1 = (0x08 << 16) | 0x100; // RGMII1_RXD2 volatile unsigned int * CONTROL_PADCONF_RGMII_RXD2 = (unsigned int *)0x44E107DC; *CONTROL_PADCONF_RGMII_RXD2 = (0x08 << 16) | 0x100; // RGMII1_RXD3 volatile unsigned int * CONTROL_PADCONF_RGMII_RXD3 = (unsigned int *)0x44E107E0; *CONTROL_PADCONF_RGMII_RXD3 = (0x08 << 16) | 0x100; // RGMII1_RX_CLK /* Set up EGMII registers */ volatile unsigned int * GMAC_CTRL = (unsigned int *)0x4A100050; *GMAC_CTRL &= ~(1 << 11); // Disable RX and TX volatile unsigned int * GMAC_STATUS = (unsigned int *)0x4A100054; volatile unsigned int * GMAC_SYM_CTRL = (unsigned int *)0x4A10001C; // Set up the GMAC and RGMII to match the board's configuration *GMAC_SYM_CTRL = (0x2 << 2) | 0x07; // Enable GMAC *GMAC_CTRL |= (1 << 11);